Numerous battery charger architectures have been developed in recent years, especially in the field of portable electronic devices for example mobile or cellular telephones. There are many different manufacturers that manufacture battery chargers that operate for different charging voltages in order for a battery to be charged.
A simple explanation of how a prior art battery charger for a mobile device works is as follows with reference to FIG. 1 and a mobile or cellular phone. A wall adaptor 1 when plugged into a phone (not shown) connects to the “Vchg” pin 2 on a chip associated with the phone, for example a CMOS Integrated Circuit (IC). This Vchg pin 2 is a power supply voltage to the IC. Typically any power supply of a CMOS Integrated Circuit (IC) is not supposed to exceed the rated voltage of the CMOS process in order to achieve reliable operation of the IC. For a 5V CMOS process any node must be limited to 5V+/−10%. This gives an absolute maximum voltage of 5.5V. This means that the application circuit of FIG. 1 is restricted to AC adaptor Voltages of less than or equal to 5.5V. However most phone manufacturers use AC adaptors with voltages that range from 5V to 8V. In many cases it is not practical for them to change the AC adaptor to suit the process limit of the IC. Inability to accommodate on-chip AC adaptor voltages greater than the rated voltage of the particular CMOS process is problematic for battery charging applications. At present approximately 50% of mobile phone chargers use AC adaptors which operate at greater than 5.5V. This means that these type of chargers need to use the implementations shown in FIGS. 2 and 3 discussed in more detail below.
Referring now to FIG. 1 in more detail the charger consists of on-chip circuitry and off-chip circuitry, distinguished in FIG. 1 by centre line 3 to define the boundary between the off-chip and on-chip circuitry. The on-chip circuitry is the Integrated Circuit IC area. There exists a charge path external to the IC, which consists of a reverse protection diode 4, a PMOS pass device 5 and a sense resistor 6. The reverse protection diode 4 prevents current flowing backwards from the battery 7. The PMOS pass device 5 is the element used to control charging current to the battery 7. This charge current control is done via a GateDrive pin 8. The Rsense resistor 6 is used to sense charge current via the Isense 9 and Vbatsense pins 10. A charge controller 11 controls turning on/off of the charging function to control charging of the battery 7. The charge controller 11 takes inputs from various analog sense circuits and controls charging accordingly. Such sense circuits may include a battery monitor, a Vchg voltage monitor, the charge timer, the battery temperature monitor. General charger circuitry indicated by block 12 comprises a Charge DAC for controlling the amount of current with which to charge the battery 7 with a constant current charging loop controls charging operation in a continuous feedback fashion.
There are a number of ways of accommodating different AC adaptor voltages for single battery charger application.
A known way of producing a charger is to choose a process with a sufficiently high rated process voltage so as to be able to accommodate all possible charger voltages on the IC. However the charger is only one element of a larger IC that includes many other functions. In particular an IC for a cellular phone includes many other digital circuitry functions. Such digital circuitry is suited to a low voltage fine line CMOS process chosen. Typically CMOS processes operate at less than 3V and can operate as low as 1V. Fine line CMOS processes allow very dense circuit layout and hence allow a much simpler product to be produced. Such digital circuitry is not suited to higher voltage CMOS processes which do not allow for such dense layout. Consequently to choose a process for the integrated circuit based solely on the charger poses technical problems and cause the cost and size of the integrated circuit to increase excessively, which is undesirable.
One way of accommodating a number of AC adaptor voltages using a CMOS process is to make use of a Zener diode 20 and a current limiting resistor (Rzener) 21 as shown in prior art FIG. 2. Such a scheme clamps the voltage at Vchg pin 2 to the zener diode voltage which is chosen to be consistent with the rated process voltage. However such a scheme is disadvantageous because when the load current and AC adaptor voltage are varied it results in excessive power dissipation (typically 400 mW) requirements which may be, for example, accommodated on a mobile phone. This is not an acceptable power loss in cellular telephone applications. In addition the cost of the zener diode 20 with such a power dissipation requirement may be too excessive for commercial applications.
Another way to provide a number of different AC adaptor voltages for the charger, which are greater than the rated process voltage, is to make use of an Off-chip voltage regulator 25 as shown in FIG. 3. The off-chip voltage regulator 25 adds to the cost of the charger function. In addition depending on the load presented to the regulator and the voltage differential across the regulator the power dissipation in the batter charger of the regulator is excessive. Furthermore the external regulator 25 requires extra Printed Circuit Board (PCB) area. There are thus additional design considerations when designing the layout of the PCB, for example as the external regulator 25 requires a separate input and output. In many applications the voltage regulator normally requires a decoupling capacitor having a separate Input and Output, which adds to the overall complexity of the charging circuit and restricts the design architecture of the charging circuit.
Accordingly, the present invention seeks to provide an improved battery charger architecture and system.